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1938102_en-US

1938102_en-US

TX_CLK Signal Configuration in 100BASE-T1 Test Mode on SJA1110

Hi 

We are currently testing the 100BASE-T1 test mode on the SJA1110 switch. During the tests, we found that the Jitter (SLAVE) requires an additional TX_CLK signal. The Software User Manual for the SJA1110 indicates that additional configuration is necessary to switch LOC_WAKE_IN to TX_CLK.

stevenYeh_1-1724307595809.png


We switching the PHY into different testmodes, and some of the test modes have passed. However, we still do not observe any signal on TX_CLK. We also reviewed the switch_config_sja1110evm example in S32 Design Studio, where only the test mode is configured.

stevenYeh_2-1724307697318.png


Could you please advise if any additional configuration is required to enable the TX_CLK signal?

Thank you for your support.

Re: TX_CLK Signal Configuration in 100BASE-T1 Test Mode on SJA1110

Hello, @steven-Yeh 

Thanks for the post.

Since this is SJA1110EVM related questions, which is not directly related with S32G, I suggest posting it in the following forum:

https://community.nxp.com/t5/Other-NXP-Products/bd-p/other

For them to provide more proper support.

Sorry for your inconvenience.


Best Regards

Chenyin

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Last update:
‎11-21-2025 04:34 PM
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