Using FreeMASTER, I'm able to get around 1.1ms reads from my ADC. I would like to be reading .1ms or even .01ms but I'm not having any luck. I'm pretty sure it's an issue with my model and not a FreeMASTER limitation because I've seen other forum posts that look like faster reads are happening.
For reference:
I started with the adc_pdb_trigger_s32k14x example model
I'm running a fixed step size of .0001 at 80MHz system clock using the S32K144EVB. I'm using prescaler value of 2 in the PDB_Config block so (I believe) I'm operating the ADC clock at 40MHz.
It should be noted that using fixed step size of .001 and .0001 makes no discernible difference to my ADC read. Changing from .001 to .01 changed my ADC read from 1ms to 10ms, as expected.
I'm struggling with clocking though so I'm pretty sure that's where the problem is. According to the data sheet, fadck has a max of 50MHz to operate reliably. I assume this means I need to scale the 80MHz down to 40MHz but is the PDB_Config the correct place? According to the help documentation, this prescaler is dividing the peripheral clock (BUS_CLK), not the system clock. I don't know where else I can divide the system clock. I'm having trouble following the clocking diagram in the ref manual but it looks like I would divide the system clock in the DIVBUS block. Not sure how to do that with the Simulink Toolbox. The only place I see for clock division is PDB_Config.
I'm seeing ADC using the BUS_CLK as peripheral clock but Note1 below says not to misinterpret the interface clock as BUS_CLK. I have no idea what that means:
When I look at this section of ref manual, I'm further confused. My only two options for clock speed are 112 and 80. Those are both acceptable for HSRUN but only 80 is acceptable for RUN. Does this mean I'm always using HSRUN or am I switching between HSRUN and RUN by switching from 112 to 80? How does this affect SYS_CLK/BUS_CLK?
I've read through multiple forum posts and a large amount of documentation and I don't feel anything about ADC clocking is obvious with the Toolbox but other people seem to be successful with it so I'm either missing something or I'm just not as smart as I think I am! Using this post I was able to understand how and why the PDB works but it's not mentioned how he got his 8000 modulus. I assume he got it by dividing his step size of .0001 by the period of 80MHz (125n). That gives 8000. Not sure why he's using 80MHz though. At any rate, I've tried to replicate his .0001 readings using his settings and I'm unable to do it. No matter what I change, I always get around 1.1ms updates. I'm attaching my model. Any help would be appreciated.
Thank you
Hi sparkee,
Since my colleague constantinrazvan.chivu, has provided you a detailed explanation regarding the PIT peripheral clock and its capabilities on LPIT Timing and Step Tick Accuracy of S32K144?, I am going to explain a bit why you see no notable changes from a certain timing.
The PDB settings from that model you attached are the following:
1. Operating Mode - Continuous --- this means that once you software triggered this block using the PDB_Start_Soft_Trigger, the PDB will automatically retrigger the signals. So the One-Shot method is more suitable for testing. This means that for the each call of the PDB_Start_Stop_Trigger block, the PDB will perform only one set of triggers. To trigger again, the Start_Stop has to be called again. If you move this block to the step function call, basically each PIT step will provide a start trigger for PDB.
The Modulus represents the top value for the PDB Counter. So once the trigger came, the PDB will count until this value and reset. For this testing purposes, the value must be as low as possible.
In the next tab, the Delay 0 is used like this: once the PDB timer starts to count, when it will match this value, it will trigger the ADC conversion.
So basically, this model is only starting the continuous PDB conversion once and then will perform the conversions at constant time intervals.
Now, what I did in the attached model, I put the start conversion PDB_Start_Soft_Trigger on the step, so basically every PIT0 will start a conversion. I minimized the PDB Modulus and triggers to 0 and basically for every step, the PDB will trigger another conversion.
Now, I was able to low the Step Size to the value of 0.00001s. The first signal represents the step trigger, the second one, represents when the model entered the PDB trigger function while the red signals represents when the mcu exited the PDB interrupt function.
Since every step time we toggle the pin, the actual frequency is double than the one computed by the scope.
Hope this helps,
Marius
sparkee,
The model I've sent you, disables the second channel trigger in order to convert faster, but on my board, the potentiometer value is still converted fine. This is the FreeMaster screenshot.
Marius
You're right Marius, I was looking at the ADC that you had disabled. I'm an idiot.
It took some time but I have figured out the proper configuration for back-to-back operation so that both ADCs will read in one-shot mode. I had pre-trigger0 in back-to-back mode which means there was never a first ADC read to kick off the sequence. I unchecked the box and it now starts when PDB triggers then pre-trigger1 fires as soon as that read is finished.
I still have a problem with the ADC read speed. I can see that the LED is switching at the step_tick timing as expected (on my scope) but the ADC is not matching that speed. I'm still seeing no faster than 1ms updates on ADC in FreeMASTER.
With step_tick at .001:
With step_tick at .0001:
FreeMaster scope properties:
There must be something simple I'm missing or FreeMASTER just isn't capable of anything below 1ms.
Hello sparkee,
The Freemaster Recorder Call block that must be added in order to achieve this functionality is this one:
Now, the recorder must also be set int he FreeMaste_Config block.
For the FreeMaster application, The maximum allowed samples point is 256, you will see this error.
But what we believe it happens is that the step time is more faster than this recorder transfer has place. And this might be the reason why you get a constant value.
Hope this helps,
Marius
