program stucks when calling _lpm_set_clock_configuration(2) in K70 with Int_Flash_DDRData_Debug configuration?

[pramodk_g_]

Hi everyone,

                    I am working in K70 tower with MQX 4.0 and CW 10.5 ( Int_Flash_DDRData_Debug configuration). I need to change different clock modes ( clock configuration 0 ,1 and 2  ) dynamically from my code. When I tried to run the code in clock configuration 2 by using api _lpm_set_clock_configuration(BSP_CLOCK_CONFIGURATION_2) the program gets stuck. According to my understandings both FLL and PLL are disabled in BPLI (mode 2) mode, does this make any problem to DDR performance and  why this program gets stuck?. Please let me know your valuable thoughts.,

Thanks,

Pramod.

[Carlos_Musich]

Hi Paramod,

your are right. As you can see in chapter "5.4 Clock definitions" of K70 reference manual, DDR module is clocked by MCGDDRCLK which is the MCG output of the PLL for the DRAM controller. Therefore, if you disable PLL DDR controller is disabled (unclocked).

If you select Int_Flash_SRAMData_Debug configuration it should work.

Regards,

Carlos