pin multiplexing

[dnappier]

I am making a custom pcb which will have the exact same processor as the k60 tower (except in LQFP). Does anyone know where I can set SPI 2 to specific pins in MQX or really any of the peripherals to my desired pins on the chip. I plan on modeling the board closely to the towers connections but where can I find the pin multiplexing code in MQX?

Thanks

[BryGuyH]

Its randomly shrewn about in the init_* bsp files. I personally didn't like the setup and instead set up my own way of doing it:

I put these in the board specific header (e.g. the replacement for twrk60n512.h):

#define BSP_PTA4_CFG    (PORT_PCR_MUX(GPIO) | PORT_PCR_ODE_MASK | PORT_PCR_DSE_MASK) /* LED RED DL1 */
#define BSP_PTA10_CFG   (PORT_PCR_MUX(GPIO) | PORT_PCR_PE_MASK)     /* BSP_ANALOG_PULLUP_1 */
#define BSP_PTA11_CFG   (PORT_PCR_MUX(GPIO))    /* CAN_STB1 */
#define BSP_PTA12_CFG   (PORT_PCR_MUX(ALT2) | PORT_PCR_DSE_MASK)    /* CAN0_TX */
#define BSP_PTA13_CFG   (PORT_PCR_MUX(ALT2) | PORT_PCR_PFE_MASK)    /* CAN0_RX */
#define BSP_PTA14_CFG   (PORT_PCR_MUX(ALT3) | PORT_PCR_DSE_MASK)    /* UART0_TX */
#define BSP_PTA15_CFG   (PORT_PCR_MUX(ALT3) | PORT_PCR_PFE_MASK)    /* UART0_RX */
#define BSP_PTA16_CFG   (PORT_PCR_MUX(ALT3) | PORT_PCR_DSE_MASK)    /* UART0_RTS */
#define BSP_PTA17_CFG   (PORT_PCR_MUX(ANLG))    /* UART0_CTS  - Used as GPIO to enable RS485 RX*/
#define BSP_PTA24_CFG   (PORT_PCR_MUX(GPIO))    /* CAN_STB2 */
 

which set up the pin muxing and then these macros to define the lwgpio port/pin info:

#define BSP_SPI_FLASH_WP_N       (LWGPIO_PORT_E | LWGPIO_PIN6)
#define BSP_SPI_FLASH_HOLD_N     (LWGPIO_PORT_E | LWGPIO_PIN7)

#define BSP_ANALOG_PULLUP_1      (LWGPIO_PORT_A | LWGPIO_PIN10)

#define BSP_ANALOG_PULLUP_2      (LWGPIO_PORT_B | LWGPIO_PIN4) 
#define BSP_ANALOG_PULLUP_3      (LWGPIO_PORT_B | LWGPIO_PIN5) 
#define BSP_ANALOG_PULLUP_4      (LWGPIO_PORT_B | LWGPIO_PIN6) 
#define BSP_ANALOG_PULLUP_5      (LWGPIO_PORT_B | LWGPIO_PIN7)

Then I added a function to init_hw.c:

void _bsp_pinmux_init(void)
{
#ifdef BSP_PTA0_CFG
 PORTA_PCR0 = BSP_PTA0_CFG;
#endif
#ifdef BSP_PTA1_CFG
 PORTA_PCR1 = BSP_PTA1_CFG;
#endif
#ifdef BSP_PTA2_CFG
 PORTA_PCR2 = BSP_PTA2_CFG;
#endif
#ifdef BSP_PTA3_CFG
 PORTA_PCR3 = BSP_PTA3_CFG;
#endif
#ifdef BSP_PTA4_CFG
 PORTA_PCR4 = BSP_PTA4_CFG;
#endif
#ifdef BSP_PTA5_CFG
 PORTA_PCR5 = BSP_PTA5_CFG;
#endif
#ifdef BSP_PTA6_CFG
 PORTA_PCR6 = BSP_PTA6_CFG;
#endif

/* etc until all pins are set */

}

And added this function to init_hw.c:

void _bsp_io_defaults(void)
{
    LWGPIO_STRUCT pin_struct;

    lwgpio_init(&pin_struct, BSP_SPI_FLASH_WP_N,    LWGPIO_DIR_OUTPUT, LWGPIO_VALUE_LOW);
    lwgpio_init(&pin_struct, BSP_SPI_FLASH_HOLD_N,  LWGPIO_DIR_OUTPUT, LWGPIO_VALUE_LOW);

    lwgpio_init(&pin_struct, BSP_ANALOG_PULLUP_1,   LWGPIO_DIR_OUTPUT, LWGPIO_VALUE_LOW);
    lwgpio_init(&pin_struct, BSP_ANALOG_PULLUP_2,   LWGPIO_DIR_OUTPUT, LWGPIO_VALUE_LOW);
    lwgpio_init(&pin_struct, BSP_ANALOG_PULLUP_3,   LWGPIO_DIR_OUTPUT, LWGPIO_VALUE_LOW);

/*etc until all pins have the correct defaults set */

}

Then I called both:

void kinetis_init(void)
{
   /* Disbale the watchdog timer */
   kinetis_wdt_disable();

   /* Set up the system clock */
   pll_init();

   /* Disable memory protection */
   _bsp_mpu_disable();

   /* Enable clock to peripheral modules */
   kinetis_clock_enable();

    /* Initializes the i/o pins to the correct function and defaults */
    _bsp_io_defaults();

    /* Configures the Processor Pin Muxes */
   _bsp_pinmux_init();

}

And then you go all you have to do is modify your board header to define the ports, pins, and muxing scheme