PLL

[divijakatabathu]

Hi, generally when does the clock initialisation takes place? There is a situation in my project where if the PLL register is not set(PLL register is set during clock initialisation) then the clock frequency is assigned with value 0 and hence in the next line in the code DIVIDE_BY_ZERO issue was seen.

So, I want to know, by any chance, will PLL ctrl register will be inactive?

Thanks in advance

[soledad]

Hello,

Sorry if I misunderstood your question.

All BSP's have a specific clock configuration, for example the BSP for the twrk60 is configured in order to use a 50 MHz XTAL if your board doesn’t have the same characteristics, then you need to modify the BSP.

The _bsp_initialize_hardware() function is responsible for basic MCU setting and setting of the Multipurpose Clock Generator (MCG) module. It switches the MCG module from the reset state through the MCG state machine to the default clock configuration indexed as BSP_CLOCK_CONFIGURATION_0.

You need to considerate the below information:

• Check the bsp_cm.c file located at the path: C:\Freescale\Freescale_MQX_4_2\mqx\source\bsp\<name_board>
• Localize the void _bsp_initialize_hardware(void) function
• Modify this function according your needs.

The attached doc shows how to change default clock settings in kinetis BSP's.

In addition I am attaching a document that shows the boot sequence of MQX.

Have a great day,
Sol

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