MQX_UNHANDLED_INTERRUPT(0x0041) after setting a GPIO pin

[jose_asensio]

Hi everyone.

I am getting this problem when I set an output pin on a K20 using

GPIO_DRV_SetPinOutput() function.

This pin enables the power for a section on my board, so I checked if voltage dips are happening on the rail powering the K20 when switching. A 2 mV dip is appearing so I think the problem is not because a power fluctuation.

I am using MQX 4.2.

Any way to know what is going on?

Thanks,

Jose

[jose_asensio · Accepted solution]

Hi.

Thanks for your time David. I am using K20DN512VLL10.

The problem was NMI input. It was being set by the modem and NMI interrupt was happening.

I disabled NMI interrupt modifying flash configuration word in startup_MK20D10.s and now everything is ok.

Thanks !!

[DavidS]

Glad you found the issue and shared it with us.

Regards,

David

[DavidS]

Hi Jose,

Please check that you have enable the clock to the desired GPIO module in the SIM module SCGC5 register before trying to access any GPIO registers.  If clock to module is not enabled, when you access a module register you get exception to occur.

Regards,

David

[jose_asensio]

Hi David.

The ports are properly clocked.

When this pin is set, an onboard GSM modem is powered and a 2 amps spike is drawn by the modem.

This power spike might be causing the exception.

How can I do to find out the source of the exception and being able to handle it?

Regards

[DavidS]

Hi Jose,

Glad GPIO clocks enabled OK.

Yes a large current draw could cause the K20 (which K20 device are you using?) to reset.

The Kinetis devices have a low-voltage detect (LVD) capability.  When voltage gets below specific value, the device will reset.

In the reference manual there is a Reset and Boot chapter.  It details what registers to look at.

6.2.2.2 Low-voltage detect (LVD)

The chip includes a system for managing low voltage conditions to protect memory

contents and control MCU system states during supply voltage variations. The system

consists of a power-on reset (POR) circuit and an LVD circuit with a user-selectable trip

voltage. The LVD system is always enabled in normal run, wait, or stop mode. The LVD

system is disabled when entering VLPx, LLS, or VLLSx modes.

The LVD can be configured to generate a reset upon detection of a low voltage condition

by setting the PMC's LVDSC1[LVDRE] bit to 1. The low voltage detection threshold is

determined by the PMC's LVDSC1[LVDV] field. After an LVD reset has occurred, the

LVD system holds the MCU in reset until the supply voltage has risen above the low

voltage detection threshold. The RCM's SRS0[LVD] bit is set following either an LVD

reset or POR.

Also chapter on Power Management Controller:

15.3 Low-voltage detect (LVD) system

This device includes a system to guard against low-voltage conditions. This protects

memory contents and controls MCU system states during supply voltage variations.

....

Regards,

David