Hi Radek Sestak:
I'm using K64 in my project.
I think that you are quite familiar with SPI module so may I ask you a question: The code in MQX BSP IS CORRECT to drive PCSn High or Low?
Before each read/write , it call function _dspi_setparam ,and in this function ,the CS pin is set to low:
_dspi_setparam{
...
/* Set CS signals */
dspi_ptr->MCR = (dspi_ptr->MCR & ~DSPI_MCR_PCSIS_MASK) | DSPI_MCR_PCSIS(~(params->CS));
return SPI_OK;
}
Actually,the CS pin is really set to LOW!!
But,in the K64 RM(K64P144M120SF5RM) Page 1452,it descripe the PCSIS is:
"
Peripheral Chip Select x Inactive State
Determines the inactive state of PCSx.
0 The inactive state of PCSx is low.
1 The inactive state of PCSx is high.
"
The key of my question is that it's the INACTIVE STATE OF PCSx,not the ACTIVE. Yes it achived the goal to make PCS low,but,it's the right method ? ?
I thought that the SPI moudule can drive the PCS pin to LOW automatically when start one transfer and set the PCS High once the last byte send out,if we set all relevant register including the PCSIS in MCR.Is my thought is right (I'm not verify it via my code yet )?
Could you slove my doubt? thank you a lot and forgive my poor English!