Getting inverted data on RX when using uart 4

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Getting inverted data on RX when using uart 4

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jesperevertsson
Contributor IV

Hi, I'm trying to get rs232 to work on our custom hardware which uses the K60F120M cpu. For uart 4 we have TX = PTE24 and RX = PTE25. To get this to work I made the following change in our BSP in init_gpio.c:

case 4:

            pctl = (PORT_MemMapPtr)PORTE_BASE_PTR;

            if (flags & IO_PERIPHERAL_PIN_MUX_ENABLE)

            {

                pctl->PCR[24] = 0 | PORT_PCR_MUX(3) | PORT_PCR_DSE_MASK; //TX

                pctl->PCR[25] = 0 | PORT_PCR_MUX(3) | PORT_PCR_DSE_MASK; //RX      

            }

            if (flags & IO_PERIPHERAL_PIN_MUX_DISABLE)

            {

                pctl->PCR[24] = 0;

                pctl->PCR[25] = 0;

            }

            if (flags & IO_PERIPHERAL_CLOCK_ENABLE)

            {

                /* start SGI clock */

                sim->SCGC1 |= SIM_SCGC1_UART4_MASK;

            }

            if (flags & IO_PERIPHERAL_CLOCK_DISABLE)

            {

                /* stop SGI clock */

                sim->SCGC1 &= (~ SIM_SCGC1_UART4_MASK);

            }

            break;

I've then made a small example to test if it works:

  #define RS485_CHANNEL "ittye:"

  ...

   MQX_FILE_PTR rs485_dev = NULL;

   char  data_buffer[6] = {0};

   data_buffer[0] = 'H';

   data_buffer[1] = 'E';

   data_buffer[2] = 'L';

   data_buffer[3] = 'L';

   data_buffer[4] = 'O';

   rs485_dev  = fopen( RS485_CHANNEL, NULL );

   uint32_t baud = 19200;

   ioctl(rs485_dev, IO_IOCTL_SERIAL_SET_BAUD, &baud);

  write( rs485_dev, data_buffer, strlen(data_buffer) );

  fflush( rs485_dev );

What happens when I run this code is that what I send on the TX is also what I get on RX (but inverted) even though it isn't connected to anything else than the logic analyzer I use to meassure. So it seems that somehow, everything I send out I recieve an inverted copy of. How can I get rid of this behaviour? Did I do anything wrong when changing init_gpio.c?

Just to clarify, this is the result from my logic analyzer (where the top signal is tx and the bottom rx):

uart.PNG

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1 Solution
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jesperevertsson
Contributor IV

Hi Daniel, I managed to find the problem. I had to add the following line:

OSC1_CR = 0x00;

to disable XTAL1 which was the default option for PTE25

View solution in original post

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971 Views
danielchen
NXP TechSupport
NXP TechSupport

Hi Jesper:

Please check the UARTx_S2 register, there is one bit to control the Receive data Inversion.

pastedImage_0.png


Have a great day,
Daniel

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jesperevertsson
Contributor IV

Hi Daniel, the RXINV bit is already set to 0. Also they way I understand is that the RXINV bit only inverts the data that is coming in from an external source. But as I said in my first post, there should be no data coming in on the rx pin. I also checked the LOOPS bit in the UARTx_C1 register but it is 0 as well.

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danielchen
NXP TechSupport
NXP TechSupport

Hi Jesper:

Please also check the TXINV bit in UARTx_C3

pastedImage_0.png

Regards

Daniel

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jesperevertsson
Contributor IV

Hi Daniel, I managed to find the problem. I had to add the following line:

OSC1_CR = 0x00;

to disable XTAL1 which was the default option for PTE25

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971 Views
danielchen
NXP TechSupport
NXP TechSupport

That's great!, Thanks for sharing

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