i am using the eTimer peripheral for generating a PWM signal.
I use the "variable frequency mode" with "OUTMODE = toogle OFLAG O/P using alternating compare reg" and i can generate a PWM signal with duty cyles 1% to 99%.
I do not know how to generate a duty cyle of 0% (output signal = low) and a duty cycle of 100% (output signal = high).
How to generate these signals in variable frequency mode?
Maybe i have to switch the "OUTMODE" to "software controlled mode"?
I resolved it the following way for the VARIBALE-FREQUENCY-PWM-Mode:
If (DC = 0% or 100%)
Then OUTMODE = Software Controlled, VAL = 0 or 1, FORCE = 1
Else (0% < DC < 100%)
Then OUTMODE = toogle OFLAG O/P using alternating compare reg, CMPLD1 = off time, CMPLD2 = on time
I have discussed it with my colleague and the only way to implement it like you do.
actually this is the way i would use it.
However I can on Monday ask colleague who has deep knowledge on it if there is any other way.