delay when detecting edge with ic_pal

[chenk]

Hello Everyone,

I am trying to use the ic_pal module to trigger an interrupt when detecting a falling edge. To check my work, I am toggling an output pin in the ISR handling the interrupt and using a logic analyzer to visualize the captured event. This way I can estimate how accurately I can react to such event. Most of the time, this works sufficiently fast, but often there are delays that are significant for my application.

The minimum expected timespan between two falling edges is 4 microseconds. I can see consistent delay (averaging ~2.3 microseconds) when reacting to a falling edge after a long run of no edges. When edges are more frequent (and rather fixed) the delay is very small and stable (a few hundreds of nanoseconds). Attached are screenshots from the logical analyzer that illustrate both cases (purple is the digital input and blue is the output pin).

I would appreciate help understanding what could cause this behavior. I assumed there would be an overhead of the interrupt handler, but it seems small and insignificant some of the time. Could this be due to some other abstraction of the ic_pal? Could I use the eMIOS driver directly to trigger an interrupt on edge?

Platform is DEVKIT-MPC5748G

ic_pal is configured over eMIOS for falling edge detection.

Thanks and best regards, Chen

[PetrS · Accepted solution]

Hi,

on "nodelay" picture you measure delay from rising edge, from falling edge it will be about 2us again, i think.
Typical interrupt latency (event till isr routine) will be around 1us min, so the delay you see is most probably due to further SW overhead. The EMIOS driver can be used directly, there should be also emios_ic demo example you can refer to.

BR, Petr

[chenk]

Hi Petr,

I shouldn't work so late You're of course right, I have misinterpreted the logic analyzer output. 

Thank you for your help.

Chen