XOSC Configuration

[PKP]

How does the MPC5777C detect failures of the XOSC mode (bypass mode external clock connected to the EXTAL pin vs. using the external oscillator)? How can software tell which mode is currently being used by the MPC5777C? The reference manual says the XOSC does not have any software accessible register, so it’s unclear how NXP expects users of the MPC5777C to detect and manage failures in the XOSC configuration.

[PKP]

The bypass mode is required by Clock FMEDA tailored by NXP to our product - column I. The cell I2 set to FALSE; FALSE: The external crystal oscillator (XOSC) is bypassed.

[davidtosenovjan]

In the bypass mode external clock mode, clock is monitored by clock monitor unit (CMU0). CMU used for its operation internal RC oscillator and it basically checks ratio between XOSC and IRC frequencies.

It seems there is no flag allowing to detect whether currently used mode is crystal oscillator or external bypass. Theoretically SW could analyze DCF record content (UTEST Miscellaneous DCF client, bit XOSCEN), what could be difficult, but not impossible. But, is this really needed to detect it SW way as it is application dependent (thus related to specific HW)?