What should PortPinSlewRate be configured for SPI pins? (NXP MCAL 4.2.2)

[AkshayNaik1907]

Hi,
I am using NXP MCAL 4.2.2 and configuring SPI communication with an external slave device.
In the Port configuration, there is a parameter called PortPinSlewRate.

For SPI pins (SCK, MOSI, MISO, CS), what is the recommended value for PortPinSlewRate?

In my testing, I am observing data corruption in all modes except when PortPinSlewRate is configured as FullDriveWithoutSlewRate.
I want to confirm what NXP officially recommends for SPI communication.

Thanks.

[petervlna · Accepted solution]

Hello,

What does PortPinSlewRate do?

• It controls how fast the pin transitions between logic levels (rise/fall time).
• Options typically include:
  • FullDriveWithoutSlewRate (fastest switching, no slew rate limitation)
  • Slow or Medium slew rate (adds delay to reduce EMI and ringing)
  • Sometimes called Slew Rate Enabled/Disabled in hardware registers.

NXP’s Recommendation for SPI Pins

For high-speed interfaces like SPI (SCK, MOSI, MISO, CS), NXP generally recommends:

• Disable slew rate limitation (i.e., use FullDriveWithoutSlewRate) for reliable high-speed communication.
• Reason: Slew rate limiting can distort edges and cause timing violations at higher SPI baud rates, leading to data corruption.
• This is consistent with the hardware default: SRE = 0 → fast slew rate on most NXP MCUs.

Why did your tests confirm this?

• When you used FullDriveWithoutSlewRate, the SPI signals had sharp edges, meeting timing requirements.
• With slower slew rates, the rise/fall times increased, causing setup/hold violations and corruption.

Official Guidance

• NXP community and application notes indicate that for SPI and other high-speed signals, fast slew rate (no limitation) is preferred.
• Slower slew rates are mainly for GPIO or low-frequency signals to reduce EMI, not for SPI

Best regards,

Peter