The SPC5746R cannot complete clock initialization when the sysclk is set to 200MHz

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The SPC5746R cannot complete clock initialization when the sysclk is set to 200MHz

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Jasting
Contributor II

I used an external crystal oscillator of 20MHz.When I configured the system clock to 200M, the clock initialization could not be completed. It worked fine when I configured the system clock to 100MHz. How can I solve this problem?

The following is a configuration that does not work.

Jasting_0-1715070614058.png

The following is a working configuration.

Jasting_1-1715070693905.png

 

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petervlna
NXP TechSupport
NXP TechSupport

Hello,

I see you are using some kind of configuration tool.

I use for 20MHz external crystal following configuration:

// Set PLL0 to 200MHz with 20MHz XOSC (PLL0 VCO frequency — 600 — 1250 MHz)
PLLDIG.PLL0CR.B.CLKCFG = 0; //Bypass mode with PLL0 off
// RFDPHI1 = 10, RFDPHI = 4, PREDIV = 2, MFD = 80 (0x50h)
PLLDIG.PLL0DV.R = 0x50000000 |0x00040000 |0x00002000 |0x0050; //predefined PLL0 divider register

Best regards,

Peter

 

 

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