Hi NXP,
I am working on the MPU of MPC5777C and experimenting on the Multi-core scenario for the same. So, for my experiment, I need to protect the peripherals of MPC5777C using MPU's RGD by not giving the permissions of Read-Write in WORD2 of MPU. I have done the configurations for SIU in CORE_0 by not giving the permissions to Read-Write from CORE_1 but from CORE_0 it(SIU) can access.
But on testing, the SIU is accessible from both the Cores, and CORE_1 was not supposed to access it according to the configurations done.
Please let me know how to protect the peripherals of MPC5777C. The configurations what I have done are below:
Configuration during Initialization:
/* Protecting whole Peripheral Bridge A memory location as SIU in under PBRIDGE A*/
MPU.RGD[2].WORD0.R = 0xC3E00000; /* Start address */
MPU.RGD[2].WORD1.R = 0xFFDFFFFF; /* End address */
MPU.RGD[2].WORD2.R = 0xFF7DF000; /* Read-write-execute not allowed for all master from core_0 and core_1 */
MPU.RGD[2].WORD3.R = 0x00000001; /* Mark descriptor as valid */
Re-Configuring the only SIU memory location in PBRIDGE A:
/* Re-Configure PBRIDGE-A memory location for SIU only */ As here Overlapping of permissions happens b/n RGD.
/* Configure the peripheral SIU of PBRIDGE-A */
MPU.RGD[6].WORD0.R = 0xC3F90000; /* Start address */
MPU.RGD[6].WORD1.R = 0xC3F93FFF; /* End address */
MPU.RGD[6].WORD2.R = 0xFF7DF65F; /* Read-write-execute allowed for all master from core_0, but not allowed from core_1 */
MPU.RGD[6].WORD3.R = 0x00000001; /* Mark descriptor as valid */
So, please let me know is this is correct or there is another way to protect peripherals of MPC5777C using MPU in such a way that one CORE is able to access but other CORE not able to access the same peripheral.
Hoping for your quick response.
Thanks & Regard,
Parth
Parth Rastogi
