Hi,
Try to do following:
After reset switch PLL on after like +5ms delay.
Also measure BLTRL pin after reset and core voltage to see the issue.
I expect there will be drop on core voltage when PLL is switch and reset is triggered by LVD.
Post here the waveform with following signals for failing part:
1. reset line
2.BCTL
3. Core voltage.
On correct sample it should looks like:

But on the failing part you will see reset on PLL swith on.
Peter