PLL lock failure detection and Timeout Handling

[kondururamu]

Hi,

Iam currently working on PLL for MPC 577xx series and would like to know some information on handling PLL lock failure detection.

1. whenever there is a loss of clock during PLL initialization,in this case if there is a lock failure then system reset is generated.

2. Can i Implement a safe solution(by timeout handling) in avoiding the system reset.

3. O have gone through the application note AN4880: Handling Crystal Failure for MPC57XX but couldnot find the complete source code in handling the timeout solution.

Please suggest me how to implement the timeout solution ?

Regards,

ramu konduru

[PetrS]

Hi,

Yes, you can configure the FCCU to generate an interrupt as the reaction to the PLL lock or XTAL clock loss failure, but this is strongly not recommended if the system is already running form PLL or XTAL.

There is no automatic system clock switch in these cases, thus the user is required to program the switch through the Mode Entry module. The point is that in such case the system will run from an unpredictable free running clock or there will be no clock at all and so a SW switch could not be executed leading to a catastrophic condition.

During PLL init, if system is running from IRC, the FCCU interrupt can be used, but once the system clock is switched to PLL the reset reaction to the failure should be selected. Thus there will be always short period of time the system will not be safety handled with respect of loss of lock/clock failure.

BR, Petr

[kondururamu]

Hi Petr,

I would like to implement timeout logic if PLL locks are unsuccessful.

1. What is the timeout period I should implement for PLL0 and PLL1 lock in case of for MPC5775K micro controller ?

2. If PLL lock is unsuccessful and there is a timeout happened then i wanted to perform a reset of micro controller ?

Is there any sample snippet of code to verify the functionality  ?

Regards,

Ramu