So, I figured out where the disconnect was.
In the SMPU_Init() function, which was borrowed from one of the NXP S32DS sample projects for MPC57xx, the addresses of the non-cacheable and cacheable regions were hard coded, as opposed to using symbols from the linker file.
Once I remembered the SMPU code, I found what I was looking for pretty quickly, and made the function more generic by referring to the appropriate symbols in the linker file and programming SMPU_0.RGD[X] and SMPU_0.RGD[Y] with the appropriate start and end registers. The CI and VLD bits in WORD3 were already programmed properly.
Incidentally, this information is covered in the PRM in chapter 20 on the SMPU.
Thanks all.