MPU in MPC5674F.

[balachander]

Hi Everybody,

                  Anyone please explain about Access Evaluation in MPU module in MPC5674F. I have studied in this document http://cache.freescale.com/files/32bit/doc/ref_manual/MPC5674FRM.pdf?fr=gdc but not got a clear idea about it.

Thanks & Regards,

Balachander G.

[lukaszadrapa]

Hi,

in short - each memory space that is accessed by any master must be covered by MPU descriptors. If the memory space is not covered, it is considered as access violation (this leads to bus error). Optionally also process identifier is used. This is described in chapter "Access Evaluation - Hit Determination".

If memory space is covered by MPU descriptor, it is necessary to evaluate if master has rights to do such access (read, write, execute in user or supervisor mode). This is described in chapter "Access Evaluation - Privilege Violation Determination". And again - if master has not rights for such access, it leads to access violation.

Attached is simple example for MPC5604B - it shows how process identifier works. It can be simply modified to test read-write-execute access. Maybe it will be helpful.

Regards,

Lukas

[balachander]

Hi,

     In the example you have given (for MPC5604B), MPU Region Descriptor n, Word 0 (MPU_RGDn.Word0) & MPU Region Descriptor n, Word 1 (MPU_RGDn.Word1) registers can be read and write so by software we can able to provide the start and end address in these registers, but in MPC5674F these registers are only readable, ​so please tell me that how it is possible to mention the start and end address for the region descriptors by the software as mentioned in the reference manual as shown below in the highlighted part.

http://cache.freescale.com/files/32bit/doc/ref_manual/MPC5674FRM.pdf?fr=gdc

Thanks & Regards,

Balachander G.

[lukaszadrapa]

Hi,

that's a typo. You can write both registers. I will create ticket for documentation team to fix it, thanks for pointing this out.

Regards,

Lukas