Hello everyone,
i have 2 questions about the power up sequence.
1. Is there an order in which the voltages must be applied to the mcu?
2. Is it required that the VDDDSTBY is present before other voltages are applied? (that is unclear in the reference manuel p.182 )
Regarding VDDDSTBY, here is only depends whether STANDBY feature is required or not. If this voltage is present when VDD_LV is off, SRAM content is preserved. If it is not, SRAM content will not be preserved (will be random after POR).
The power-on signal is a combination of LVDs monitoring of supplies:• VDD_LV• VDD_HV_PMC• VDD_HV_IO• VDD_HV_FLA
This signal is released high on exit of the power sequence.
However following limitation exists:
davidtosenovjan_0-1628512227079.png