MPC5777C - M

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MPC5777C - M

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MatheusFranklin
Contributor IV

Hello!

 

When I was reading the PFLASH chapter of the reference manual, I saw that the PFLASH_PFCR1 and PFLASH_PFCR2 registers have fields like P1_M2PFE. This field allows the user to enable or disable prefetching from specific masters.

MatheusFranklin_0-1731978813116.png

My question is:

If the field P1_M2PFE is set to zero and the master with the logical ID number 2 (FEC) makes a read request, would the data be stored in the mini-cache before it is sent to the FEC or not?

My concern is that even disabling this field, a request from the associated master could evict data in the mini-cache that belongs to other master (e.g., a core).

Best regards,

Matheus

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davidtosenovjan
NXP TechSupport
NXP TechSupport

No, in your scenario there would be no difference between 'enabled' and 'disabled'.

Without pre-fetching master accesses directly the flash content, with pre-fetching it goes over mini-cache i.e. prefetch buffer.

As it is flash memory, no coherency issues happen.

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davidtosenovjan
NXP TechSupport
NXP TechSupport

No, in your scenario there would be no difference between 'enabled' and 'disabled'.

Without pre-fetching master accesses directly the flash content, with pre-fetching it goes over mini-cache i.e. prefetch buffer.

As it is flash memory, no coherency issues happen.

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