MPC5777C-Clock source to the PIT Timer

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MPC5777C-Clock source to the PIT Timer

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yashkumar
Contributor III

Example MPC5777C-PinToggleStationery GHS714 

Hi,

Thanks for this example,could you help me about the clock source to the PIT Timer .

what is the out put clock friquency of phi and phi1 in above example.

please help on .

Thanks!

2 Replies

395 Views
PetrS
NXP TechSupport
NXP TechSupport

Hi,

clocks are configured in the startup, see init.s file.

PLL0 is configured to 192MHz (40MHz XOSC reference) and PLL1 to 264MHz (48MHz PLL0 PHI1 output reference).

PIT is running from PER_CLK; as the setting used is SIU_SYSDIV[PERCLKSEL]=1 and SIU_SYSDIV[PERDIV]=0, the

PIT clock is PLL0/2 = 96MHz.

BR, Petr

395 Views
yashkumar
Contributor III

Hi Petr,

Yes, i have gone through startup . And thanks alot for this help.

 

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