Hi,
Have a board with a MPC5748G mcu and am having problems in initialising two of three FLEXCAN modules (CAN0, CAN1 and CAN7). The configuration is identical for all three modules, but can only initialise CAN0 successfully. The config for CAN0 is shown below:
const flexcan_user_config_t canCom1_InitConfig0 = {
.fd_enable = false,
.pe_clock = FLEXCAN_CLK_SOURCE_PERIPH,
.max_num_mb = 16,
.num_id_filters = FLEXCAN_RX_FIFO_ID_FILTERS_8,
.is_rx_fifo_needed = false,
.flexcanMode = FLEXCAN_NORMAL_MODE,
.payload = FLEXCAN_PAYLOAD_SIZE_8,
.bitrate = {
.propSeg = 7,
.phaseSeg1 = 4,
.phaseSeg2 = 1,
.preDivider = 4,
.rJumpwidth = 1
},
.bitrate_cbt = {
.propSeg = 7,
.phaseSeg1 = 4,
.phaseSeg2 = 1,
.preDivider = 4,
.rJumpwidth = 1
},
.transfer_type = FLEXCAN_RXFIFO_USING_INTERRUPTS,
.rxFifoDMAChannel = 0U
};
I'm using the peripheral clock as the clock source as there was a problem initialising the system clock when FXOSC was enabled.
I've checked the reference manual and while the clock source for CAN0 is slightly different to the other CAN modules, all frequencies seem to be correct, i.e. FS80, F40 etc.
I'm current using S32 SDK 3.0.0 (PA11) although this behaviour was also prevalent in S32 SDK 3.0.3 (PA15).
With regard to CAN1 and CAN7, the module initialisation gets stuck in the while loop in the FLEXCAN_Enable() routine...
void FLEXCAN_Enable(CAN_Type * base)
{
/* Check for low power mode */
if(((base->MCR & CAN_MCR_LPMACK_MASK) >> CAN_MCR_LPMACK_SHIFT) == 1U)
{
/* Enable clock */
base->MCR = (base->MCR & ~CAN_MCR_MDIS_MASK) | CAN_MCR_MDIS(0U);
base->MCR = (base->MCR & ~CAN_MCR_FRZ_MASK) | CAN_MCR_FRZ(0U);
base->MCR = (base->MCR & ~CAN_MCR_HALT_MASK) | CAN_MCR_HALT(0U);
/* Wait until enabled */
while (((base->MCR & CAN_MCR_NOTRDY_MASK) >> CAN_MCR_NOTRDY_SHIFT) != 0U) {}
}
}
From what I can tell, it look like the NOTRDY flag is never cleared.
I would be most grateful for any help with this.
Best regards
Rob
