MPC5674F initialization with external RAM

[anton_pancheshnyy]

Hello all

I am a bit new to the embedded system world so please bear with me. I am trying to migrate the code from Code Warrior platform to S32DS. It seems that initialization part is not the same between the 2 tools. On our custom board (using it to run an internal combustion engine) we are using the internal flash and external RAM to run the code. I have looked through the NXP document about MPC5674F software initialization and optimization and it looks like a lot of startup is done in a provided startup.s file. But I did not see anything about using the external RAM. My question is, do I need to write a routine in the startup.s file in order to initialize external RAM or is there a setting in the S32DS that I can click and it will automatically change from using the internal SRAM to external RAM if the address is provided. 

Additionally, can one run a one line assembly code in the .c file or is that not possible with GCC compiler? What is the format? From code warrior we had:

asm{

instruction 1

instruction 2

instruction 3

}

In S32 it seems to use () parenthesis, but its still not liking it. Any help is greatly appreciated guys! Like I said, I am new to embedded systems so this is a little bit of a learning curve for me. 

[anton_pancheshnyy]

Ah okay. So every external ram is initialized the same way with the only difference being the address of where it’s starting and the TLB number? 

[davidtosenovjan]

I have external SRAM initialized in the base project code here:

https://community.nxp.com/t5/MPC5xxx-Knowledge-Base/Example-XPC567XFKIT-PinToggleStationery-CW210/ta...

Pay attention to main.c file.

This code has been prepared for GHS compiler, but I have also tried S32DS with different device, syntax appropriately modified:

https://community.nxp.com/t5/MPC5xxx-Knowledge-Base/Example-MPC5777C-External-SRAM-test-S32DS-Power-...

[anton_pancheshnyy]

Mr Tosenovjan

Great, thank you. I keep seeing this file called __ppc_eabi_init.c but that seems to be a CW only part. Is it not relevant for S32? What is that file for? We additionally have this function usr_init() that’s an assembly function that is referenced a few times in the file mentioned above. I believe I have attached the function picture to this thread. We do not have internet at the moment so I’m having to do everything over the phone. Is this new function part of S32? All it seems to do is initialize internal ram which I believe is done by different code. 

[davidtosenovjan]

EBI initialization in my examples you will find in main file, functions

static void External_SRAM_init(void);
static asm void External_SRAM_MMU_init(void);

__ppc_eabi_init.c is a part of CW initialization and in the S32DS it is done different way.

[anton_pancheshnyy]

Mr Tosenovyan

Thank you for that explanation. I have some more questions regarding MMU initialization section. After talking with my colleague, we have discovered that there are multiple SRAM sources. On our board we have a Cyclone 4 FPGA connected to the MPC5674F. Controller is connected to the FPGAs dual port ram. That ram is also used to communicate with the controller box over the Ethernet. My understanding is, the ram for FPGA needs to be set up basically same way as external ram chip. What I am not entirely understanding though is how the MAS registers and the values written into them actually set up the external ram. You have it in your function External_SRAM_MMU_init(). I’ve read through the spec sheet for the e200z7 core but the registers to me seem to be just generic registers. But somehow writing the values that you have initializes them. Could you explain that part to me in further detail please? If possible more comments in the assembly code as to why are those specific values are written into those MAS0-2 registers. Is TLB considered to be a pipeline in essence that ties the controller to the external ram? Like a highway to a different city? 

Thank you in advance

[davidtosenovjan]

No, it is a bit differently. External_SRAM_MMU_init configure address ranges for whole EBI space, but on our EVB we only one external memory that why I have named this function this way.

If you have connected multiple memories, you basically do not need to change anything unless it is specific application requirement.

Regarding MMU, I would recommend to see following thread where I shared link to MMU configurator and some presentation slides:
https://community.nxp.com/t5/MPC5xxx/Unlocking-data-cache-in-MPC5674F/m-p/1460186

Regarding EBI configuration, see EBI FAQs:
https://community.nxp.com/t5/MPC5xxx-Knowledge-Base/External-Bus-Interface-FAQs/ta-p/1124068