MPC5604C NVUSRO Register Options

[ghogg]

Hello everyone,

Please could someone give a detailed explanation regarding the OSCILLATOR_MARGIN and PAD3V5V options in present in the MPC5604C NVUSRO register?

Many thanks for the support.

Kind regards,

Greg

[davidtosenovjan]

PAD3V5V pin determines length of the edges for output drive pads to keep the rise time the same for a 3V configuration and 5V configuration.

The OSCILLATOR MARGIN bit is provided for adjusting oscillation margin at higher frequencies.

It is recommended that OSCILLATOR_MARGIN = 0 for 4MHz and OSCILLATOR_MARGIN = 1 for 8MHz, 10MHz, 12MHz, 16MHz  frequencies.

Both bits are basically specifies drive strength of these pads.

[kiminkim]

Should we configure the PAD3V5V = 0 if when operating VDD is 5V?

[davidtosenovjan]

Yes, you should. It'll work in both cases, but some electrical characteristic may not be fulfilled.

Expected configuration is either

VDD = 5.0 V ± 10%, PAD3V5V = 0

or

VDD = 3.3 V ± 10%, PAD3V5V = 1