MPC5604B DSPI variable frame length and CTAR

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MPC5604B DSPI variable frame length and CTAR

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cthhk
NXP Employee
NXP Employee

Dear Team:

 

We are using MPC5604B to communicate with external EEPROM (part number is M93C66) through DSPI. To access the external EEPROM we need to send 11-bit address followed by 16-bit data, so we modified CTAR to adjust the DSPI frame.

 

However according to reference manual, "Switching CTARs between frames while using continuous selection can cause errors in the transfer. The CS signal must be negated before CTAR is switched." So do you see any risk when changing frame size bits of CTAR?

Or could you help to provide an example how to solve this?

 

Appreciate your support!

 

Best Regards,

WY

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davidtosenovjan
NXP TechSupport
NXP TechSupport

I am almost sure it is possible to use it this way as I think it is only manual inaccuracy.

Some other manuals from MPC56xx family has it described different way:

pastedImage_1.png

Let me check with factory if it is implemented same way. If it is I will report it as documentation error.

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davidtosenovjan
NXP TechSupport
NXP TechSupport

I am almost sure it is possible to use it this way as I think it is only manual inaccuracy.

Some other manuals from MPC56xx family has it described different way:

pastedImage_1.png

Let me check with factory if it is implemented same way. If it is I will report it as documentation error.

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cthhk
NXP Employee
NXP Employee

Hello David:

Thank you very much for your clarification.

Have you got any update from factory team? It would be easy for the customer if it's only typo.

Best Regards,

WY

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davidtosenovjan
NXP TechSupport
NXP TechSupport

Yes, I have been confirmed that doc screenshot above is applicable to MPC5604B/C as well. Customer may use two CTAR configuration with different FMSZ having CS asserted between both transfers.

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cthhk
NXP Employee
NXP Employee

hi David:

Very clear and Thank you very much!

Best Regards,

WY

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