MPC5554 EBI timing with differernt Ext Bus Frequency

[williamweishaup]

OnTable 22 Sheet 33 of the MPC data sheet Rev 4 three external bus frequencies are shown.

1) Do the 3 frequencies correspond to the 3 different speed grades the MPC5554 is available in? For example if I have a 132 MHz part (MPC5554MZP132) and have the external bus frequency running at 33 MHz would I use the delays in the 66 MHz column not the delays in the 40 MHz column?

2) The delay values given in the table are with DSC = 0b10 do you have maximum delay values when DSC = 0b11?

[williamweishaup]

David.  thanks for you reply. I read the document you referenced I believe section 2.2 of the documents applies to my use since I am using a 132 MHz speed grade part with SIU_ECCR[EBDF} set for Divide by 4, is this correct? Is section 2.1 referring to a design using a 80 MHz speed grade part with the system clock equal to 66 MHz and SIU_ECCR[EBDF} set for Divide by 2 for a CLKOUT = 33 MHz?  If this is not the case section 2.2 appears to be in conflict with section 2.1.

[davidtosenovjan]

Section 2.1 describes consequences of changing of system clock and yes, it applies to setting with SIU_ECCR[EBDF} set for Divide by 2.

Section 2.2 describes consequences of changing CLKOUT divider to ‘Divide by 4’. - if this is your case, you are looking at the column 66MHz.

[davidtosenovjan]

1) See following document, section 2:

https://community.nxp.com/docs/DOC-101725 

2) Unfortunately we don't have such specification.