Hi @mehmetkaradag
it depends on system clock, on number of flash wait states, if the cache is enabled and if the code is already cached...
In general, I would expect some lower tens of core cycles for prologue.
To get more accurate value, the best way is to do some measurement directly in your system. Easiest option is to use external interrupt on a pin - the handler then can toggle a GPIO right at the beginning of interrupt handler, so you can measure the time by an oscilloscope - from edge on external interrupt pin to edge on toggled GPIO.
It also depends if there are other interrupts, if nesting is enabled etc. High priority interrupt can block low priority interrupt, so it's always necessary to consider whole system.
Regards,
Lukas