How to use PLL clock as monitoring clock in CMU_PLL(CMU_0)-MPC5746R

[renjithr]

Hi,

I want to use CMU for PLL fault check in MPC5746R

Is it possible to use PLL clock as a monitoring clock in CMU_0 (CMU_PLL)..?

- If Yes, any specific configuration is required to select the monitored clock source as PLL.

Please find the attachment ,which is captured from MPC5746RRM.pdf

Thanks ,

Renjith

[PetrS · Accepted solution]

Hi Renjith,

The PLL0_PHI clock output is connected to the CLKMN1 input clock of the MPC5746R’s CMU_0 module.

This clock can only be monitored, cannot be monitoring/referencing clock. The CLKMN1 (PLL0) is compared to high-limit and low-limit frequencies to determine wheter the CLKMN1 frequency is between the specified limits.

These limits are set by the CMU_0.HFREFR and CMU_0.LFREFR registers as

high-limit freq = (HFREF ÷ 16) × (f_{CLKMT0_RMN} ÷ 4)

low-limit freq = (LFREF ÷ 16) × (f_{CLKMT0_RMN} ÷ 4).

The f_{CLKMT0_RMN} is equal to IRC_OSC clock

BR, Petr