That’s what I did by configuring:
1) CGM_AC3_SC register to select 16 MHz RC osc for PLL0
2) CGM_AC4_SC register to select 16 MHz RC osc for PLL1
However, the configuration was never successful. The program execution stuck at the while loop, waiting for PLL to lock.
By further reading MPC5643L user manual, chapter 27, Frequency-Modulated Phase-Locked Loop (FMPLL),
It never mentioned inter RC oscillator can be used as the colock source for PLL.
Do you have sample code I can try?
Thanks,
Ning
//////////////////////// The following are the code I used ////////////////////////////////////////////
/* Oscillator Output is Disabled as rootclock */
/* The End of Count Value for XOSC = 0x80 */
/* The XOSC Clock Interrupt: Disabled */
CGM.AC3_SC.B.SELCTL = 0; /* Select 16 MHz RC osc for PLL0 */
/* PLL0 reference clock source : 16MHz IRC */
CGM.AC4_SC.B.SELCTL = 0; /* Select 16 MHz RC osc for PLL1 */
/* PLL1 reference clock source : 16MHz IRC*/
CGM.FMPLL[0].CR.R = PLL_VALUE_0 | (0x01 << 8);
CGM.FMPLL[0].MR.R = 0x00000000;
/* The selected Spread Type: Down Spread */
/* The Modulation Period for FMPLL0: 0 */
/* Frequency modulation for PLL: Disabled */
/* The Increment Step for FMPLL0: 0 */
CGM.FMPLL[1].CR.R = PLL_VALUE_1 | (0x01 << 8);
CGM.FMPLL[1].MR.R = 0x00000000;
/* The selected Spread Type: Down Spread */
/* The Modulation Period for FMPLL1: 0 */
/* Frequency modulation for PLL: Disabled */
/* The Increment Step for FMPLL1: 0 */
/*
