@lukaszadrapa I scrolled through the example you attached I just couldn't use it as it is as I am using S32, I am rather using the flash c55 driver from an s32 example, which implements the same logic you are using that is:
1. initializing flash (clearing error bits)
2. initializing UTEST mode by writing password to UT0
3. setting the appropriate SELn bits (SEL2 = 0x1)
4. setting AIS bit for sequential sequence
5. no breakpoints
6. seeding UMn registers with offline generated MISR
7. setting AIE bit to start the check
I then get a different MISR values in UMn registers, I have also noticed that the used MISR in your example is generated while the tool is configured to "little endian" however the MPC5744p controller is based on "big-endian" architecture. I have attached the elf and mot files I am using in addition to the offline tool generated signature and the hardware generated signature if you could just confirm the offline generated signature is correct and matches your hardware.