FLEXCAN1 on DEVKIT-MPC5748G not ACKing external CAN frames (TJA1051T/3 Transceiver)

[Alex26]

Hello everyone,

I'm working with the DEVKIT-MPC5748G and trying to configure the board as a middle-man CAN node, using two separate FLEXCAN modules.

• FLEXCAN0 (with the onboard transceiver) works perfectly — it receives and acknowledges CAN frames from my Vector VN5650.

• I'm trying to use FLEXCAN1 with an external TJA1051T/3 transceiver connected to PC10 (TX) and PC11 (RX).

The transceiver is supplied with 5 V and GND from the devkit, and the SLNT pin is pulled to GND to ensure it is in normal operating mode.

When I send a CAN frame from the Vector tool, I get a "no acknowledge" error.
To debug this, I connected a logic analyzer to PC11 (RX) and I can see the CAN frame clearly arriving at the pin — but the devkit does not ACK it.

This leads me to believe that my pin mux configuration or internal routing might be incorrect, despite appearing similar to the working setup for FLEXCAN0.

Working FLEXCAN 0 pin_mux.c config:

{
.base = SIUL2,
.pinPortIdx = 16u,
.mux = PORT_MUX_ALT1,
.outputBuffer = PORT_OUTPUT_BUFFER_ENABLED,
.openDrain = PORT_OPEN_DRAIN_DISABLED,
.slewRateCtrlSel = HALF_STRENGTH_WITH_SLEWRATE_CONTROL,
.hysteresisSelect = PORT_HYSTERESYS_DISABLED,
.safeMode = PORT_SAFE_MODE_DISABLED,
.analogPadCtrlSel = PORT_ANALOG_PAD_CONTROL_DISABLED,
.inputBuffer = PORT_INPUT_BUFFER_DISABLED,
.pullConfig = PORT_INTERNAL_PULL_NOT_ENABLED,
.gpioBase = PTB,
},
{
.base = SIUL2,
.pinPortIdx = 17u,
.mux = PORT_MUX_AS_GPIO,
.outputBuffer = PORT_OUTPUT_BUFFER_DISABLED,
.openDrain = PORT_OPEN_DRAIN_DISABLED,
.slewRateCtrlSel = HALF_STRENGTH_WITH_SLEWRATE_CONTROL,
.hysteresisSelect = PORT_HYSTERESYS_DISABLED,
.safeMode = PORT_SAFE_MODE_DISABLED,
.analogPadCtrlSel = PORT_ANALOG_PAD_CONTROL_DISABLED,
.inputBuffer = PORT_INPUT_BUFFER_ENABLED,
.pullConfig = PORT_INTERNAL_PULL_NOT_ENABLED,
.gpioBase = PTB,
.intConfig =
{
.intEdgeSel = SIUL2_INT_DISABLE
},
.inputMux[0] = PORT_INPUT_MUX_ALT2,
.inputMuxReg[0] = 188,
.inputMux[1] = PORT_INPUT_MUX_NO_INIT,
.inputMux[2] = PORT_INPUT_MUX_NO_INIT,
.inputMux[3] = PORT_INPUT_MUX_NO_INIT,
.inputMux[4] = PORT_INPUT_MUX_NO_INIT,
.inputMux[5] = PORT_INPUT_MUX_NO_INIT,
.inputMux[6] = PORT_INPUT_MUX_NO_INIT,
.inputMux[7] = PORT_INPUT_MUX_NO_INIT,
},

Not working FLEXCAN 1 pin_mux.c config:

{

    .base              = SIUL2,

    .pinPortIdx        = 42u,  // PC10 = GPIO42

    .mux               = PORT_MUX_ALT1,

    .outputBuffer      = PORT_OUTPUT_BUFFER_ENABLED,

    .inputBuffer       = PORT_INPUT_BUFFER_DISABLED,

    .openDrain         = PORT_OPEN_DRAIN_DISABLED,

    .slewRateCtrlSel   = HALF_STRENGTH_WITH_SLEWRATE_CONTROL,

    .hysteresisSelect  = PORT_HYSTERESYS_DISABLED,

    .safeMode          = PORT_SAFE_MODE_DISABLED,

    .analogPadCtrlSel  = PORT_ANALOG_PAD_CONTROL_DISABLED,

    .pullConfig        = PORT_INTERNAL_PULL_NOT_ENABLED,

    .gpioBase          = PTC,

},

{

    .base              = SIUL2,

    .pinPortIdx        = 43u,  // PC11 = GPIO43

    .mux               = PORT_MUX_AS_GPIO,

    .outputBuffer      = PORT_OUTPUT_BUFFER_DISABLED,

    .inputBuffer       = PORT_INPUT_BUFFER_ENABLED,

    .pullConfig        = PORT_INTERNAL_PULL_NOT_ENABLED,

    .gpioBase          = PTC,

    .intConfig         = { .intEdgeSel = SIUL2_INT_DISABLE },

    .inputMux[0]       = PORT_INPUT_MUX_ALT2,

    .inputMuxReg[0]    = 189,

    .inputMux[1]       = PORT_INPUT_MUX_NO_INIT,

    .inputMux[2]       = PORT_INPUT_MUX_NO_INIT,

    .inputMux[3]       = PORT_INPUT_MUX_NO_INIT,

    .inputMux[4]       = PORT_INPUT_MUX_NO_INIT,

    .inputMux[5]       = PORT_INPUT_MUX_NO_INIT,

    .inputMux[6]       = PORT_INPUT_MUX_NO_INIT,

    .inputMux[7]       = PORT_INPUT_MUX_NO_INIT,

},

I would appreciate, if someone has an idea, what I am doing wrong!

Thanks in advance!

Kind regards,
Alex

[PetrS · Accepted solution]

Hi,

for FlexCAN1 RX on PTC11 the IMCR189 must be 3

So the config structure should be

{

    .base              = SIUL2,

    .pinPortIdx        = 43u,  // PC11 = GPIO43

    .mux               = PORT_MUX_AS_GPIO,

    .outputBuffer      = PORT_OUTPUT_BUFFER_DISABLED,

    .inputBuffer       = PORT_INPUT_BUFFER_ENABLED,

    .pullConfig        = PORT_INTERNAL_PULL_NOT_ENABLED,

    .gpioBase          = PTC,

    .intConfig         = { .intEdgeSel = SIUL2_INT_DISABLE },

    .inputMux[0]       = PORT_INPUT_MUX_ALT3,

    .inputMuxReg[0]    = 189,

    .inputMux[1]       = PORT_INPUT_MUX_NO_INIT,

    .inputMux[2]       = PORT_INPUT_MUX_NO_INIT,

    .inputMux[3]       = PORT_INPUT_MUX_NO_INIT,

    .inputMux[4]       = PORT_INPUT_MUX_NO_INIT,

    .inputMux[5]       = PORT_INPUT_MUX_NO_INIT,

    .inputMux[6]       = PORT_INPUT_MUX_NO_INIT,

    .inputMux[7]       = PORT_INPUT_MUX_NO_INIT,

},

BR, Petr