FCCU issue in MPC5744p

[praveenkumar123]

I am using MPC5744p micro, we are trying trying to configure FCCU for all Non Critical faults with LONG RESET.

We do follow following steps for FCCU configuration.

1. Disable Software Watchdog (Always Disables in our application.)

2.Clear all faults by clearing NFSx registers.

3. Read for any active faults .

4. Clear again if faults are active.

5. Set FCCU to Bi stable state.

6.RUN the application.

When we connect the debugger and RUN this configuration , there is no problem . But when I disconnect the debugger and RUN without debugger , code is stuck in FCCU Config State.Then I observed that SWT_0 was set in NFSx registers but I had disabled watchdog in my start up code itself. And even after Clear the NFSx registers , the fault is not cleared as a result code is stuck in FCCU config state.

Kindly let me know why SWT_0 is setting even after disabling the software watchdog ?

Why I am not able to Clear SWT_0 fault with NFSx registers ?

When Debugger "Target Reset is issued" then FCCU shows no fault , but why FCCU shows a fault when I perform a hard reset . This totally doesn't make sense.

Appreciate your Help !

Praveen

[petervlna]

Hi,

Please read carefully what we have shared with you.

If your reset is occurring continuously this mean you do not disable SWT or you have other fault which cause the reset. This depends in FCCU NCF register content or RGM FES/DES content.

This is how I dissable SWT in startup:

    e_lis    r7,(0xFC05)
    ; Provide SWT key 1
    e_li    r6,0xC520
    se_stw    r6,0x10(r7)
    ; Provide SWT key 2
    e_li    r6,0xD928
    se_stw    r6,0x10(r7)

    ;  SWT_0 disable
    se_lwz    r6,0x0(r7)
    se_bclri r6,0x1F
    se_stw    r6,0x0(r7)

You can also check example codes here:

https://community.nxp.com/docs/DOC-329623 

Peter

[praveenkumar123]

HI Peter,

By default SWT_0 watch dog is enabled as its default value is 0xFF00111B (WEN is set).

So in our bootloader we are servicing this watchdog by writing

   FBL_SWT_SR = 0xA602u; /* SWT trigger sequence, step 1 */
   FBL_SWT_SR = 0xB480u;

and then before jumping into application we are trying to disable the watchdog by writing

   /* Disable watchdog */
   FBL_SWT_SR = 0x0000C520ul; /* Key access 1st step */
   FBL_SWT_SR = 0x0000D928ul; /* Key access 2nd step */
   FBL_SWT_CR = 0x8000010Aul; /* Disable SWT */

but the above command doesn't seem to be working at all, as I see still the FCCU NCF[14] is set.

But if I disable the watchdog with following snippet  at beginning in init before service/ petting it , then everything works good (NCF[14] is not set.)

   /* Disable watchdog */
   FBL_SWT_SR = 0x0000C520ul; /* Key access 1st step */
   FBL_SWT_SR = 0x0000D928ul; /* Key access 2nd step */
   FBL_SWT_CR = 0x8000010Aul; /* Disable SWT */

Now my question is it possible to disable the watchdog in runtime after its being serviced for timeout?

How do I ensure that watchdog is getting disabled without looking for no reset .(I meant is there a possibility to read CR register's WEN bit and confirm the same.)

All your examples show first watch dog being disabled and then enabled .

Can you please share an example with  first watchdog being enabled and then serviced for sometime and then disabled.

Thanks for your help!!

Praveen

[petervlna]

Hi,

Yes you can disable SWT anytime.

To check if it is disabled check WEN bit after disabling SWT.

Peter

[fu860925]

How to inject ncf[0]-ncf[4], two inject mothod,

First：FCCU_DRV_SetNcfFake(0U,2U), no reaction, FCCU not switch to alarm or fault status, why?

Second：PMC->FIR = 0x1U;

When debug this line, s32 design studio show error, why?

Error : Error in ONCE status register during instruction execution.

[petervlna]

Hi,

Debugger dissable SWT by default.

When you run your SW without debugged and do not handle SWT in SW it will expire.

When SWT expire TIF flag in SWT is set.

This flag will set fault line connected to FCCU NCF[14] active. There no possibility to clear this flag on MPC5744P device.

Even if you clear NCF[14] in FCCU, active SWT TIF line will set this fault immediately again.

Therefore you are not able to enter FCCU config state.

In previous MPC56xx devices SWT TIF was redundantly connected to FCCU and RGM. RGM (reset module) triggered reset always on TIF line active. This reset also cleared TIF and there was no need to have possibility to clear it via SW.

However on MPC57xx SWT is not connected to RGM and therefore you must configure reset reaction on NCF[14] in FCCU on MPC57xx devices.

Peter

[shidongxing]

Hi Peter：

I have a Isystem Debugger but the NCF[14] still appears, why would this happen?

[petervlna]

Only reason for NCF[14] is that your SWT has expired. And only way to clear NCF[14] when your SWT expired is to reset the device.

Peter

[praveenkumar123]

Hi Peter/David,

I have disabled watchdog in startup code itself.

Following is the code snippet to disable watchdog.

    # # Turn off SWT
    # #SWT0
    e_lis   r4, 0xFC05
    e_or2i  r4, 0x0000

    e_li    r3, 0xC520
    e_stw   r3, 0x10(r4)

    e_li    r3, 0xD928
    e_stw   r3, 0x10(r4)
    e_lis   r3, 0xFF00

    e_or2i  r3, 0x010A
    e_stw   r3, 0(r4)

And if I issue a reset when SWT_0 is set in NCF_Sx, reset is occurring continuously .

I have given functional reset to clear the NCF[14].

kindly review the above code snippet . And when I check for SWT TIF after connecting a debugger , that bit was not set.

[davidtosenovjan]

Hi, it is because SWT timeout happened before FCCU has been configured. Or you are disabling SWT after its timeout happened. Then the only way how to clear the FCCU SWT fault, is to reset the device.

In your software what would be needed to do is to disable SWT at the very beginning of the SW startup.

Hope it helps