ECC RAM Error Injection on MPC5644A

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ECC RAM Error Injection on MPC5644A

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1,602件の閲覧回数
tunayan
Contributor II

Dear Community Users,

 

I am using mpc5644A EVB kit with CW 10.6

 

I have a problem with ECC Ram check. I tried to follow AN5200 application note but it was not work for me.

 

So basically i am doing below operation;

 

#define ECSM_ECR_ERNCR_MASK    0x02 // RAM Noncorrectable

 

//INIT

ECSM.ECR.R = (uint8_t)ECSM_ECR_ERNCR_MASK ; // non-correctable RAM ECC error

 

//FORCE TO GENERATE ERROR

ECSM.EEGR.R = (uint16_t)(ECSM_EEGR_FR1NCI_MASK | 1);

 

//GENERATE WRONG READ OP

test[0] = 0xCAFEBEEF;

 

//FOUND ECC ERROR

test_read = test[0]; 

 

In that line, i assume that ECSM.ESR.B.RNCE must be "1". But this register seems "0".

 

I am doing that operation with debug mode. Is it important? How can i inject a RAM error to system?

 

Thanks all.

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1,207件の閲覧回数
davidtosenovjan
NXP TechSupport
NXP TechSupport

I must admit I have an error in my AN5200 Example 1 source code. I cannot imagine how it happened. Hoping it'll be corrected early in our public web.

Corrected example you may download here:

Example MPC5634M_2b_RAM_ECC_error_injection CW210

Following code line is incorrect

/* Force internal SRAM one non-correctable data error */

ECSM.EEGR.R = (uint16_t)(ECSM_EEGR_FR1NCI_MASK | 1);

and it should be as follows

/* Force internal SRAM one non-correctable data error */

ECSM.EEGR.R = (uint16_t)(ECSM_EEGR_FR1NCI_MASK | 32);

The root cause of this issue is that basically that Table 3 of AN5200 is valid for MPC5634M as well.

I am very sorry for my embarrassing fault.

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1,207件の閲覧回数
davidtosenovjan
NXP TechSupport
NXP TechSupport

Just to inform you - Revision 1 of the document is now officially published and mentioned error is corrected in the Example 1.

http://cache.freescale.com/files/microcontrollers/doc/app_note/AN5200.pdf

http://cache.freescale.com/files/microcontrollers/doc/app_note/AN5200SW.zip

1,207件の閲覧回数
tunayan
Contributor II

Problem is solved. You are right

Thank you.

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1,208件の閲覧回数
davidtosenovjan
NXP TechSupport
NXP TechSupport

I must admit I have an error in my AN5200 Example 1 source code. I cannot imagine how it happened. Hoping it'll be corrected early in our public web.

Corrected example you may download here:

Example MPC5634M_2b_RAM_ECC_error_injection CW210

Following code line is incorrect

/* Force internal SRAM one non-correctable data error */

ECSM.EEGR.R = (uint16_t)(ECSM_EEGR_FR1NCI_MASK | 1);

and it should be as follows

/* Force internal SRAM one non-correctable data error */

ECSM.EEGR.R = (uint16_t)(ECSM_EEGR_FR1NCI_MASK | 32);

The root cause of this issue is that basically that Table 3 of AN5200 is valid for MPC5634M as well.

I am very sorry for my embarrassing fault.