Hi Martin,
I had investigated your use case little bit deeper and I think it will be possible to create the function you need. INTC handles only one interrupt at a time. Other interrupts are not "saved" to INTC, but only their flags in peripheral registers signalize to INTC there are some "active" interrupts which should be handled. So if you clear this interrupt flags in peripheral registers, interrupts will not be handled.
Test case(which I tested on MPC5775K board):
Lets say you have configured 2 PIT channels. First channel has period 1 second, second channel has period 1.1 second. You have disabled EE bit and both TIF flags are set. Now, if you clear both TIF flags and enable EE bit, only one interrupt will be triggered. It will be the interrupt which is triggered first, after EE bit was disabled. In this scenario it is PIT first channel interrupt. Second interrupt will not be handled after next period.
I hope it helps you little bit and if you have any other questions, please feel free to write me back.
Regards,
Martin