All-X Errors

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All-X Errors

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ikarkala
Contributor III

Hi All,

I have been trying to understand the concept of ALL-X Error for MPC5777C and couldn't get a clear understanding of it.

Please help me out with the below question.A detailed explanation would be wonderful.

1.What is All-X Error ?

2. Is it undetectable by ECC?

3.What is the use of finding All-X Error ?

4.Does ECC throw a fake error when All-X is detected ? If yes how do we differentiate between the real error and the false one ?

5.MPC577CSM provides an algorithm for determining addresses for testing All-X in RAM.What should be done once we obtain these addresses ?

6.Any additional details that need to be considered or any reference documents would be great 

Thanks 

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6 Replies

1,179 Views
ikarkala
Contributor III

Peter,

Thank you so much for response.

Could you please address these questions as well

1.)How do we know whether the data is correct since we will not know what data is written?

2) I see lot many addresses generated by the script, do we have to continuously keep checking these addresses.?

Regards,

Indira 

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petervlna
NXP TechSupport
NXP TechSupport

Hello,

1.)How do we know whether the data is correct since we will not know what data is written?

[Peter] - hmm, I do not understand. How can you do not know what data is written?

2) I see lot many addresses generated by the script, do we have to continuously keep checking these addresses.?

[Peter] - Yes. As the ECC wont be detected there.

I personally never tried the script so i cannot judge what is a lot.

Have in mind that safety manual implementations are not mandatory. There could be other ways how to achieve certain ASIL level.

regards,

Peter

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pitchaimuthu_pa
Contributor I

Hi,

May I know what coverage does handling of All-X errors give. Is this needed for high diagnostics coverage or medium diagnostics coverage?

I am trying to understand if this is a mandatory requirement for the SIL2 platforms?

Regards,

Pandiyarajan.P

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ikarkala
Contributor III

Peter,

What I mean when I say we will not know what data is present in the location is  we store values of various local/global variables in the SRAM which are continuously updated therefore they keep changing during run time .For Example If we are checking diagnostics for an output driver for every 100ms ,the start time is marked and elapsed time(stored in a variable ) is checked each time before checking diagnostics. This elapsed time keeps changing everytime we enter that particular function and there is no way we will know what value had to be there just in case it becomes ALL-0 or ALL-1.

Thanks,

Indira 

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petervlna
NXP TechSupport
NXP TechSupport

Hello,

I do not think that in this case there is way to track the addresses and their correct data if you cant compare it with any pattern. Maybe partially by checking only upper half of 32-bit data where lower half will represents the measured data.

regards,

Peter

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petervlna
NXP TechSupport
NXP TechSupport

Hello,

1.What is All-X Error ?

X represents 0 or 1 as chapter 8.1 Testing All-X in RAM describes.

2. Is it undetectable by ECC?

Only in some cases:

What this is saying is that the algorithm has a weakness at certain addresses because the check-bits cover both address and data.  If the data is all 1 or all 0 at certain specific addresses (and assuming it is not supposed to be) then it won't be detected.

3.What is the use of finding All-X Error ?

Test read the location periodically to make sure if it contains all 1s or all 0s that it is supposed to contain all 0s or all 1s per the application use-case. 

4.Does ECC throw a fake error when All-X is detected ? If yes how do we differentiate between the real error and the false one ?

No. The ECC won't be detected.

5.MPC577CSM provides an algorithm for determining addresses for testing All-X in RAM.What should be done once we obtain these addresses ?

Ensure that they contain correct data.

6.Any additional details that need to be considered or any reference documents would be great 

The problem is that if something causes a memory location (meaning all the data AND check-bits) to go to all 0s or all 1s, then that won't be detected by ECC because for certain addresses, for example, all 0 data and all 0 checkbits... is valid.

It's kind of like how some multi-bit errors can't be detected because if you flip enough bits you might end up with a data and checkbits that are a valid ECC combination.

But in this case, the problem can occur even if only two bits flip in data+ECC.

The probability of happening this is extremely low.

regards,

Peter