********************************************************************************
* Detailed Description:
* This example initializes SMPU_0 and SMPU_1 to cover all memory resources for
* all masters.
* Simple test case is used in this example: after initialization, SMPU
* configuration is changed to disable write access to last 4kB of RAM.
* Once this area is written by CPU, exception will occur due to access
* violation.
* ------------------------------------------------------------------------------
* Test HW: MPC57xx
* Maskset: 1N81M
* Target : SRAM
* Fsys: 160 MHz PLL
*
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