********************************************************************************
* Detailed Description:
* ------------------------------------------------------------------------------
* Test HW: MPC57xx
* Maskset: 1N81M
* Target : SRAM
* Fsys: 160 MHz PLL
*
********************************************************************************
Revision History:
1.0 Oct-29-2014 b21190(Vlna Peter) Initial Version
1.1 Nov-20-2014 b21190(Vlna Peter) Modified for Cut2.0
1.2 Nov-20-2014 b21190(Vlna Peter) Added SWT_0 dissabling in startup
1.3 Mar-10-2016 b21190(Vlna Peter) Fixed clock configuraion for PLL
1.4 Feb-23-2017 b21190(Vlna Peter) FCCU EOUT and bi-stable protocol
1.5 Aug-26-2021 nxa13250(Vlna Peter) modified for MPC5746C
*******************************************************************************/
