i.MX93 usdhc3 SDIO support

[hamzaatifi]

Hi there,

We have a question about the i.MX93 SDIO interface:

A wifi/bluetooth adapter has been developed for a single board computer that uses the i.MX93. To communicate via SDIO, the following pins are used

MX93_PAD_GPIO_IO22__USDHC3_CLK 0x179e
MX93_PAD_SD3_CMD__USDHC3_CMD 0x4000139e
MX93_PAD_SD3_DATA0__USDHC3_DATA0 0x4000139e
MX93_PAD_SD3_DATA1__USDHC3_DATA1 0x4000139e
MX93_PAD_SD3_DATA2__USDHC3_DATA2 0x4000139e
MX93_PAD_SD3_DATA3__USDHC3_DATA3 0x4000139e

The software we use automatically selects SDR104 mode, in which the clock runs at 200MHz. During our tests, we did not notice any problems with communication between the WiFi module and an access point.

The following information can be found in the industrial products datasheet under "4.12.1.7 uSDHC supported modes":

The datasheet offers two options: 1. primary SD3_ pins are used for SDIO 2. primary GPIO pins are used for SDIO.

But in our case only GPIO_22 is used for the clock and the other pins are SD3_pins.

So the question is whether SDR50 and SDR104 modes are also not supported in this specific case? And what could be the negative effects if SDR104 mode is not disabled?

Looking forward to your support.

Best regards,

Hamza

[Manuel_Salas · Accepted solution]

Hello @hamzaatifi 

I hope you are doing very well.

Given that the SDIO clock line (USDHC3_CLK) is the primary reference for timing, signal alignment, and edge detection in high-speed modes such as SDR50 and SDR104, routing this signal through an alternate function pin (GPIO_IO22) introduces potential variations in trace impedance, drive strength, and timing skew.

According to the datasheet, when any of the uSDHC3 signals are multiplexed through GPIO_IO[27:22], SDR50 (100 MHz) and SDR104 (200 MHz) modes are explicitly not supported.

So, this configuration outside of the officially supported operating conditions for SDR50/SDR104.

Best regards,

Salas.