Hi,
I also couldn't find information about a public, reference-manual-level details the SmartDMA registers and architecture, here are some comments from the relevant team after double checking:
- The SmartDMA is a programmable coprocessor designed to offload the main Arm processor by handling complex, I/O-driven tasks and data manipulation, which is why it is required for use with the FlexIO peripheral instead of the standard DMA controller.
- Unlike a traditional DMA controller that is configured through registers, the SmartDMA executes a dedicated firmware program to perform its function .The smartDMA driver consists of two parts:
• Configuration and scheduling functions.
• smartDMA firmware program
The execution program flow of smartDMA is as follows:
1. Set the parameters of the specific function of the firmware program to be executed.
2. Call SMARTDMA_Reset() to reset smartDMA.
3. Call SMARTDMA_Boot() to start smartDMA to run the given program based on the API index.
4. After the smartDMA execution is completed, an interrupt signal is generated to notify the Arm core that the execution is completed.
Details in the below AN, section 4.3 SmartDMA overview: Using FlexIO and SmartDMA to Emulate Parallel Camera Interface on i.MX RT500
