Hi,
I met a few issues about I3C receive IBI payload issue. Hope you can help. Appreciate.
When I used NXP974 as I3C master, how many payload data include MDB can we received? In my test, it seems the maximum is 8 bytes. (one MDB and seven payload data). But from the spec, it indicates that support 9 bytes include MDB. Can you help to confirm?
Spec : The controller automatically stops IBI data after 9 bytes (including the mandatory data byte).
Another issue I met is when I set the payload to 8 bytes, I do received the 8 bytes from fifo but it will enter IBI again and caused system stuck even if we didn't send new IBI from i3c target. When the payload size is less than 8 bytes, it works well.
I checked the RX FIFO count from SDATACTRL, it is 8. I think it is correct. And the status of irq seems correct, it is same as normal case (0x2e00). So I guess it is correct too.
Then, I tried to capture the waveform by LA. I found some different between correct and incorrect case.
In normal case (payload < 7) the whole clock period of last T-bit is low, then generate a Stop.
In the wrong case, the SDA will be high in the rising edge of the T-bit clock. Then, resend clock (open-drain).
Do you know what happened on the NXP? Why there are different behaviors when the payload size is different?
