MCXN947: How can the period of the PPS signal be controlled with the ADDEND register?

[michael_fischer]

Hello,

Reference is made to the “MCX N Reference Manual” Rev. 7.
The FRDM-MCX947 board with the NXP SDK v25.06.00 is used here.

The configuration for PTP looks like this:

#ifdef ENET_PTP1588FEATURE_REQUIRED
   enet_ptp_config_t ptpConfig;
   memset(&ptpConfig, 0x00, sizeof(ptpConfig));
   config.specialControl      = kENET_MulticastAllEnable | kENET_StoreAndForward;
   ptpConfig.fineUpdateEnable = true;  
   ptpConfig.ptp1588V2Enable  = true;
   ptpConfig.tsRollover       = kENET_DigitalRollover;
   config.ptpConfig           = &ptpConfig;
   config.ptpClkHz            = 50000000U;
#endif 

The digital rollover mode is used here. For the GPIO, PORT 3 pin 20 is used:

   CLOCK_EnableClock(kCLOCK_Port3);

   const port_pin_config_t pin_config = {
                                         kPORT_PullDisable,
                                         kPORT_LowPullResistor,
                                         kPORT_FastSlewRate,
                                         kPORT_PassiveFilterDisable,
                                         kPORT_OpenDrainDisable,
                                         kPORT_LowDriveStrength,
                                         kPORT_MuxAlt1,
                                         kPORT_InputBufferEnable,
                                         kPORT_InputNormal,
                                         kPORT_UnlockRegister};

   /* PORT3_20 is configured as TRIG_OUT0 */
   PORT_SetPinConfig(PORT3, 20U, &pin_config);

   CLOCK_EnableClock(kCLOCK_InputMux);
   INPUTMUX->EXT_TRIG[0] = INPUTMUX_EXT_TRIGN_EXT_TRIG_INP(0x2F);

In order to output a PPS signal at all, the TSCFUPDT bit and the ADDEND register must be set:

ENET0->MAC_TIMESTAMP_CONTROL |= ENET_MAC_TIMESTAMP_CONTROL_TSCFUPDT_MASK;
ENET_Ptp1588CorrectTimerInFine(ENET0, 0xFFFFFFFF);

This now creates a PPS period of 1000 005 596ns. The clock runs too fast here. As PTP clock 50MHz is specified here, which leads to a MAC_SUB_SECOND_INCREMENT of 20.

If I have understood correctly, then the fine correction can be done via the ADDEND register. The new ADDEND (Anew) is calculated as follows:

Anew = Aold * (Time wrong / 1e9)

In my case, this gives the following value:

Anew = 0xFFFFFFFF * (1000005596 / 1e9) = 0x100005DE2

The new value cannot be used here because it is too large for the register.

How can the clock be slowed down in such a case?

I have now made the following change and set the MAC_SUB_SECOND_INCREMENT to 21.

This produces a period of 952 384 638ns with an ADDEND of 0xFFFFFFFF. The formula now results in the following new ADDEND:

Anew = 0xFFFFFFFF * (952384638 / 1e9) = 0xF3CF7AC8

With this new value, I now get a period of 999 999 675ns, which is almost ideal.

Is this the right way or am I missing something here?

From the description on page 3058, "70.3.8.9 System timeregister module" I don't really get the hang of how else to set it.

I have running an RT1170 board with the ENET-IP. INC, INC_CORR and ATCOR are used there. But here on the N947 with the ENET_QoS I have the problems.

Best regards,
Michael

[Harry_Zhang · Accepted solution]

Hi @michael_fischer 

I have checked the these registers.

Your method is correct.

Adjust the increment (MAC_SUB_SECOND_INCREMENT) first
Then apply fine correction using ADDEND.

BR

Harry

[michael_fischer]

Hello @Harry_Zhang

this means that even at a 50MHz clock an INC of 40 is allowed, and I then have to set the ADDEND register to 0x80000000.
I have already tested this, and I was able to set a good period here.

In that case, however, the clock for the timestamp would run twice as fast as originally thought. Here you would have to multiply the timestamps later by 20/40 = 0.5, is that correct?

If I set a "wrong" INC, I have to take this into account later in the timestamps, which I get from the actual hardware.
In the case of the slight deviation at INC = 21, I have to multiply by 20/21.

Best regards,
Michael

[Harry_Zhang]

Hi @michael_fischer 

I think If the PPS signal is correctly calibrated through the ADDEND adjustment, no further software scaling of the timestamps is necessary.

BR

Harry