Hi @wx1 ,
Thanks for your updated information.
A1: Yes, it is right that the peripheral access address of both cores is the same. Please refer to RT500RM chapter2 Memory Maps
A2: I do not think it is your code version issue, Currently, Zephyr's support for the MIMXRT595 is mainly focused on the Cortex-M33 core.
please create a new case for future issues. we will do our best to support you.
Best Regards
MayLiu