Hi,
We are using CCM_CLKO1 as a GPIO in our application, but we’re seeing a clock signal output at reset, which is not ideal for our setup. This behavior is shown in the attached oscilloscope screenshots.
Details:
Any insights or recommendations on how to resolve this would be greatly appreciated!
Thank you!
已解决! 转到解答。
Hello,
This is an expected behavior since reset state will change IOMUX register to configure the pin as CCM_CLKOX function and is changed until device tree is loaded.
As you mention, U-boot/kernel does not causes this.
If you change the IOMUX option before e.g. in SLP, you could reduce the time with the clock output at reset.
Best regards.
Hello,
This is an expected behavior since reset state will change IOMUX register to configure the pin as CCM_CLKOX function and is changed until device tree is loaded.
As you mention, U-boot/kernel does not causes this.
If you change the IOMUX option before e.g. in SLP, you could reduce the time with the clock output at reset.
Best regards.