Transfer structure for LPUART driver does not have the 'direction' field: it looks like (unlike LPI2C and LPSPI) we can initiate 'read' and 'write' transfers independently using LPUART_TransferReceiveNonBlocking and LPUART_TransferSendNonBlocking (i.e. it looks like one can be initiated without waiting for the completion of the other). Does both transfers have independent state machines ? Can we use both transfers at the same time not worrying about transfer corruption (like missing characters etc.) ?
We have a device that sends and receives data asynchronously and we have to keep 'receive' transfer active all the time (we don't know when the incoming data may be sent) waiting for possible incoming transfer. And once in a while we must also send data...
Thanks for help
Maciek