After using the clock driver to get the KE18F512 working in MCUXpresso, I thought I would share that there's a bug that prevents it from working. In fsl_clock.h, there is a structure for the SCG system clock divider:
typedef struct _scg_sys_clk_config
{
uint32_t divSlow : 4; /*!< Slow clock divider, see @ref scg_sys_clk_div_t. */
uint32_t divBus : 4; /*!< Bus clock divider, see @ref scg_sys_clk_div_t. */
uint32_t : 4; /*!< Reserved. */
uint32_t : 4; /*!< Reserved. */
uint32_t divCore : 4; /*!< Core clock divider, see @ref scg_sys_clk_div_t. */
uint32_t : 4; /*!< Reserved. */
uint32_t src : 4; /*!< System clock source, see @ref scg_sys_clk_src_t. */
uint32_t : 4; /*!< reserved. */
} scg_sys_clk_config_t;
Unfortunately, GCC does not include the unnamed "reserved" fields, so the structure is not 32 bits wide as is needed to write the SCG_RCCR register, so it does not get changed. It is necessary to name the reserved fields to make it work:
typedef struct _scg_sys_clk_config
{
uint32_t divSlow : 4; /*!< Slow clock divider, see @ref scg_sys_clk_div_t. */
uint32_t divBus : 4; /*!< Bus clock divider, see @ref scg_sys_clk_div_t. */
uint32_t reserved1: 4; /*!< Reserved. */
uint32_t reserved2: 4; /*!< Reserved. */
uint32_t divCore : 4; /*!< Core clock divider, see @ref scg_sys_clk_div_t. */
uint32_t reserved3: 4; /*!< Reserved. */
uint32_t src : 4; /*!< System clock source, see @ref scg_sys_clk_src_t. */
uint32_t reserved4: 4; /*!< reserved. */
} scg_sys_clk_config_t;