IRQ usage in i2s_dma_driver

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IRQ usage in i2s_dma_driver

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scottm
Senior Contributor II

The demo application for i2s_dma_driver has the interrupts for each FlexComm module being enabled. Are they actually necessary? DMA-based I2S output seems to work just fine without the IRQ enabled. Is this generating extraneous interrupts? Or is it maybe there for error condition handling or something?

Thanks,

Scott

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

I have run the _i2s_dma_transfer example based on LPC54018-EVK, as the following screenshot, the I2S interrupt are disabled for TX and error feature in DMA modes.

Hope it can help you

BR

XiangJun Rong

 

xiangjun_rong_0-1673230835669.png

 

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scottm
Senior Contributor II

Thank you. I'm sure you can appreciate that when there's so little documentation, having extraneous things thrown into the examples really doesn't help.

The reason I asked is that I noticed that many times when I pause the debugger I find it's waiting in the fsl_i2s_dma driver. I added a GPIO flag to the driver's DMA interrupt callback and this is what I get. The top channel is the I2S bus. The bottom channel is high when the ISR is active.

All the system should be doing is sending a burst of I2S data 240 times a second. When the DMA transfer completes, though, the driver hangs for 1.45 ms. This happens in I2S_DMACallback() when it uses I2S_EmptyTxFifo(). It goes through its maximum timeout delay waiting for the TX FIFO empty flag. This happens in interrupt context, so you can imagine what it's doing to the performance of the system to have it spinning in an ISR for 30% of the time.

What gives?

Screenshot 2023-01-08 19.36.47.png

 

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