As the title says, in the SDK2.16 version of the MCU NXPRT1170 chip, compared with the SDK2.9 version, the Reset fifo processing has been deleted in the FLEXSPI_CheckAndClearError function of the fsl_flexspi.c file, but the reason for the deletion is unknown.
Deleted Reset fifo processing code:
base->IPTXFCR |= FLEXSPI_IPTXFCR_CLRIPTXF_MASK;
base->IPRXFCR |= FLEXSPI_IPRXFCR_CLRIPRXF_MASK;
The FLEXSPI_CheckAndClearError function will check whether there is an error in the FLEXSPI_WriteBlocking, FLEXSPI_ReadBlocking and other functions.
If an error is found, FLEXSPI_ClearInterruptStatusFlags(base, status); will be executed.
I just don't know why the Reset fifo processing was deleted in SDK2.16?
Hi @mega32 ,
After confirming with experts that It is unnecessary to have FIFO cleaning in check and clean error, as Transfer(Non)Blocking clear the FIFOs prior each transfer. But for sure, clearing the FIFOs in case of an error removes any data (succesfully) received so far. It is being reset at the beginning. I do not say it is wrong, but it may be risky (error prone) to manipulate it in the middle of loops.
We can see that before call this FLEXSPI_CheckAndClearError inside write or read blocking function, at the beginning of the FLEXSPI_TransferBlocking, it will reset the FIFO, so no need to reset it during the transfer process.
Best regards,
Gavin
Hi @mega32 ,
After confirming with experts that It is unnecessary to have FIFO cleaning in check and clean error, as Transfer(Non)Blocking clear the FIFOs prior each transfer. But for sure, clearing the FIFOs in case of an error removes any data (succesfully) received so far. It is being reset at the beginning. I do not say it is wrong, but it may be risky (error prone) to manipulate it in the middle of loops.
We can see that before call this FLEXSPI_CheckAndClearError inside write or read blocking function, at the beginning of the FLEXSPI_TransferBlocking, it will reset the FIFO, so no need to reset it during the transfer process.
Best regards,
Gavin
