Hi Daniel,
From what I can see now the situation is like this:
using redlib(none), initiating UART0 and UART1, I can control UART1 , regarding
UART0 I can read a char from UART0->D, but I can't send anything on Tx, I have checked that Tx and Rx are active.
/* UART0&1 init */
SIM->SCGC |= SIM_SCGC_UART0_MASK;
SIM->SCGC |= SIM_SCGC_UART1_MASK;
uart_config_t uart_config;
uart_config.baudRate_Bps = 19200U;
uart_config.parityMode = kUART_ParityDisabled;
uart_config.stopBitCount = kUART_OneStopBit;
uart_config.enableRx = true;
uart_config.enableTx = true;
UART_Init(UART0, &uart_config, 20000000U);
UART_Init(UART1, &uart_config, 20000000U);
When compiling for release I use None (-O0) and debug level(none) etc.......
When I simply changed through "quick setting" and UART Consol, the code size just increased but still same problem with UART0
From the pin_mux.c you can see
/* pin 23,24 is configured as UART0_TX, UART0_RX */
PORT_SetPinSelect(kPORT_UART0, kPORT_UART0_RXPTB0_TXPTB1);
/* pin 36,37 is configured as UART1_TX, UART1_RX */
PORT_SetPinSelect(kPORT_UART1, kPORT_UART1_RXPTC7_TXPTC6);
/* pin 43 is configured as RESET_b */
PORT_SetPinSelect(kPORT_RESET, kPORT_RST_RSTPE);
/* pin 44,42 is configured as SWD_DIO, SWD_CLK */
PORT_SetPinSelect(kPORT_SWDE, kPORT_SWDE_SWDE);
SIM->SOPT0 = ((SIM->SOPT0 &
/* Mask bits to zero which are setting */
(~(SIM_SOPT0_RXDFE_MASK | SIM_SOPT0_CLKOE_MASK)))
/* UART0 RxD Filter Select: 0x00u. */
| SIM_SOPT0_RXDFE(0x00u)
/* Bus Clock Output Enable: 0x00u. */
| SIM_SOPT0_CLKOE(0x00u));
Any other Ideas ??
Regards
Claes