Potential bug in for the IMX RT1060 with IOMUXC_GPR registers

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Potential bug in for the IMX RT1060 with IOMUXC_GPR registers

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Contributor I

I have found a potential bug in the MCU config tool. 

The IMX RT1060 has a feature where it has 2 gpio peripherals on one pin. The IOMUXC_GPR register is used for selecting which gpio peripheral to use. When using only one functional group this works correctly. But when multiple functional groups are used they can interfere with each other. 

So during init first is one functional group initialized with:

  IOMUXC_GPR->GPR27 = ((IOMUXC_GPR->GPR27 &
    (~(IOMUXC_GPR_GPR27_GPIO_MUX2_GPIO_SEL_MASK))) /* Mask bits to zero which are setting */
      | IOMUXC_GPR_GPR27_GPIO_MUX2_GPIO_SEL(0xBF160C00U) /* GPIO2 and GPIO7 share same IO MUX function, GPIO_MUX2 selects one GPIO function: 0xBF160C00U */
    );

then the second functional group is initialized and it does: 

  IOMUXC_GPR->GPR27 = ((IOMUXC_GPR->GPR27 &
    (~(IOMUXC_GPR_GPR27_GPIO_MUX2_GPIO_SEL_MASK))) /* Mask bits to zero which are setting */
      | IOMUXC_GPR_GPR27_GPIO_MUX2_GPIO_SEL(0x00U) /* GPIO2 and GPIO7 share same IO MUX function, GPIO_MUX2 selects one GPIO function: 0x00U */
    );

Which removes this configuration. 

I would expect that the generated code would only touch the bits corresponding to the pins that are defined in this functional group and not all bits in the register.

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NXP Employee
NXP Employee

Hello Robbert-Jan,

thank you for notifying us about the issue. We will update the mask to clear only affected bits for each Functional group.

Sorry for inconvenience.

Best Regards

Jan Kucera

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