ccs and LS1021a config commands

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ccs and LS1021a config commands

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Senior Contributor I

Hi !

I'm quite new to ccs and can't find much documentation about it. I'm trying to achieve secure boot on a LS1021ATWR boards, and as explained in OTPMK and secure boot by Adrian, I'm trying to use ccs to try my configuration without burning the SRKH fuses. I'm trying to use the CMSISDAP interface.

My two main source of documentation are NXP SDK v1.9 and SECURE BOOT LS1021A-IOT BOARD

Following the first one (U-boot -> Secure boot -> .. -> Useful U-boot and CCS commands) I get:

% config cc cmsisdap

Identified CMSIS-DAP SERNUM: 20000203C5231E0638DFC1FE

Firmware version: 0203

0: CMSIS-DAP (cmsisdap) CC software ver. {0.3}

% ccs::config_server 0 10000

% ccs::config_chain {ls1020a dap sap2}

% display ccs::get_config_chain

Chain Position 0: LS1020A

Chain Position 1: DAP

Chain Position 2: SAP2

# Trying to dump RCWSR1

% ccs::display_mem 0 0x1ee0100 4 0 4

CC driver failure

Unimplemented

% ccs::display_mem 1 0x1ee0100 4 0 4

CC driver failure

% ccs::display_mem 2 0x1ee0100 4 0 4

CC driver failure

# Trying to reset the board in debug mode

% ccs::reset_to_debug

LS1020A: Core not responding

I guess it is normal since I have a ls1021atwr board. If I try the commands from the secure boot on iot, I get

% ::ccs::config_chain {ls1021a dap sap2}

can't read "::ccs::core(ls1021a)": no such element in array

Since I pretty much don't know how to use ccs:

1) why is config_chain {ls1021a} not working ?

2) Is there a way to display the elements of ccs::core ?

3) Is there some documentation about ccs around ? I did not find any in the installer, nor on the website

Best,

Vincent

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NXP Employee
NXP Employee

If you want to read core registers you can use ccs::read_reg command. About the reset_to_debug command, this will pus the core in debug mode (you can check the cores state using ccs::all_run_mode) and it is normal that uboot execution to be stooped. If you want to resume, try with ccs::run_core <chain_possition>. To find the chain position use display ccs::get_config_chain.

Adrian

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NXP Employee
NXP Employee

Also, commands for read/write memory using ccs::read_mem and ccs::write_mem. An example is below:

display ccs::read_mem 9 0x1ee0100 4 1 4

ccs::write_mem 9 0x1ee0100 4 0 0x12345678

Adrian

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Senior Contributor I

Dear addiyi​, could you explain me the "space" (1 in your read_mem example, 0 in your write_mem example) argument ? If I try to write to an address like 0x1ee0204 (DCFG_CCSR_SCRATCHRW2) with 0, I get a "Scan Timeout" error. If I try with 1, the write is correctly perform (at least read_mem displays the new value).

Side question: however, if I try to write to 0x1ee00e4 (DCFG_CCSR_BRR) with 0, I also get the Scan Timeout error, but with 1, nothing is written (and so my core 0 remains in Reset mode)

Best,

Vincent

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Contributor II

Vincent,

Did you ever get an explanation of the "space" parameter?

Thanks,

Brett S.

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Senior Contributor I

Dear brettstahlman‌, I started another thread for the space parameter, since I didn't get an answer here :smileyhappy: Please check https://community.nxp.com/thread/391726 

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Contributor III

Excellent! Thanks Vincent.

Brett S.

On Mon, Mar 26, 2018 at 2:13 AM, Vincent Siles <admin@community.nxp.com>

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Contributor II

addiyi You never answered Vincent's question regarding "space" values, and I haven't seen any documentation on this. I'm sure the ccs tool is very powerful, but it would be much more useful to customers if they weren't forced to reverse engineer it...

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Senior Contributor I

Ok, my bad, writing 0x01000000 doesn't work but writing  0x01 did. I though I should write the 0x01000000 value because the register is big endian...

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Senior Contributor I

Thanks. I kind of prefer the display_mem version, which displays memory in hex format, but it is good to know !

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NXP Employee
NXP Employee

When cmsisdap is using the chain must be configured using below ccs command:

config cc cmsisdap

ccs::config_chain {ls1020a cmsisdap}

Also, make sure SDA_SWD_EN Control switch is 0.

Adrian

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Senior Contributor I

Once again, thank you addiyi​ !

The switch was ok, and with your config_chain, I managed to reset_to_debug and read the memory !

Is it possible to dump the values of registers ? I didn't find how.

Also, after the reset_to_debug command, the board reseted and the uart display stopped in the middle of u-boot SPL. Is there a way to set a breakpoint / resume execution, or at least know where it is stopped ?

Best,

Vincent

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NXP Employee
NXP Employee

If you want to read core registers you can use ccs::read_reg command. About the reset_to_debug command, this will pus the core in debug mode (you can check the cores state using ccs::all_run_mode) and it is normal that uboot execution to be stooped. If you want to resume, try with ccs::run_core <chain_possition>. To find the chain position use display ccs::get_config_chain.

Adrian

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Senior Contributor I

Thank you for all this !

I still have problem with the read_reg command but the rest is really ok.

When performing ccs::display_reg 9 0 4 I get and Invalid parameter error. I think I don't get the correct reg_index, and maybe I should find this info in the coresight documentation or something ?

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NXP Employee
NXP Employee

An example of displaying PC value:

(bin) 71 % display ccs::read_reg 9 pc 1

     pc=0x534C4F4F

For registers index you can take a look into ccs\bin and see tarm.tcl.

Adrian

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Senior Contributor I

Thank you so much for all the support !

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